1. Field of the Invention
The present invention relates to a semiconductor device, a method of fabricating the semiconductor device, and a printing mask, and more particularly, to a method of printing a bonding material for bonding circuit elements of a semiconductor device to a wiring layer formed on a substrate.
2. Description of the Related Art
Use of radio frequency semiconductor chips including monolithic microwave integrated circuits (referred to as xe2x80x9cMMIC chipsxe2x80x9d) has progressively become prevalent for the miniaturization and weight-reduction of devices with the diffusion of portable personal assistants. The MMIC chip is housed in a semiconductor module or a semiconductor package. For example, when fabricating a semiconductor module including a MMIC chip, the MMIC chip is placed in a cavity in a multilayer substrate and is bonded to the multilayer substrate by die bonding, a solder cream for bonding circuit elements to a wiring layer is printed on the surface of the multilayer substrate, and circuit elements are bonded to a wiring layer on the surface of the multilayer substrate.
To fabricate a small, lightweight portable personal assistant, semiconductor chips, i.e., circuit elements, have been miniaturized to reduce the size of multilayer substrates, and areas for printed solder cream for bonding circuit elements to the wiring layer have been reduced in addition to the miniaturization of MMIC chips.
For example, semiconductor chips of the 0603 type having an area of 0.6 mmxc3x970.3 mm in a plane have been preferred to those of the 1005 type having an area of 1.0 mmxc3x970.5 mm in a plane.
FIG. 17 is a sectional view of a prior art cavity-embedded module disclosed in Japanese Patent Laid-open No. Hei. 8-321567.
Shown in FIG. 17 are a module 100, a semiconductor chip 102, a multilayer substrate 104, a cavity 104a, chips 106, edge electrodes 108, a die-bonding layer 110, solder films 112, a potting material 114, bonding wires 116, a protective film 118, a heat-dissipating pad 120, and a metal case 122. Like or corresponding parts are denoted by the same reference characters throughout the drawings.
A method of fabricating this prior art module 100 will be described. The semiconductor chip 102 is placed in the cavity 104a of the multilayer substrate 104 and is bonded to the bottom surface of the cavity 104a. The semiconductor chip 102 is connected to wiring lines on the multilayer substrate 104 with the bonding wires 116. Then, the cavity 104a is filled with the potting material 114 and the potting material 114 is cured. The potting material 114 fills the cavity 104a so that the surface of the potting material does not protrude from the surface of the multilayer substrate 104. Subsequently, the solder films 112 for bonding the chips 106 to wiring lines on the surface of the multilayer substrate 104 are printed on the surface of the multilayer substrate 104.
FIG. 18 is a typical sectional view of assistance in explaining a conventional printing method of printing the solder films 112 on the surface of the multilayer substrate 104. Shown in FIG. 18 are a printing mask 124, openings 124a in the printing mask 124, a squeegee 126, and a solder cream 112a. 
The printing mask 124 is placed on the surface of the multilayer substrate 104, the solder cream 112a is applied to the surface of the printing mask 124, and then the squeegee 126 is moved in the direction of the arrow to press the solder cream 112a into the openings 124a of the printing mask 124 to apply the solder cream in a pattern to the surface of the multilayer substrate 104. Then, the printing mask 124 is separated from the multilayer substrate 104 to form the solder films 112 on the surface of the multilayer substrate 104. Then, the chips 106 are put on the solder films 112, and the chips 106 and the solder films 112 are heated to bond the chips 106 to the wiring lines.
As chips are miniaturized progressively and chips of the 0603 type become used prevalently instead of those of the 1005 type, the area of the openings 124a of the printing mask 124 is reduced accordingly. Therefore, the solder films 112 formed on the surface of the multilayer substrate 104 by forcing the solder cream 112a into the openings 124a with the squeegee 126 adhere to the brims of the openings 124a of the printing mask 124 and come completely off the surface of the multilayer substrate 104 or come partly off the surface of the multilayer substrate 104. The amount of the solder cream 112a remaining on the surface of the multilayer substrate 104 becomes far less than that of the solder cream 112a expected to remain on the surface of the multilayer substrate 104 when the printing mask 124 is separated from the multilayer substrate 104, which causes faulty mounting of the chips 106 on the multilayer substrate 104.
Although an increase of the fluidity of the solder cream 112a will reduce the possibility of separation of the solder films 112 from the surface of the multilayer substrate 104, the adjacent solder films 112 tend to join together because the solder cream 112a is flowable and, consequently, the wiring lines are short-circuited and the yield rate of semiconductor device is reduced.
Thus solder films formed of a conventional solder cream having a low fluidity tend to be separated from the surface of the multilayer substrate 104 when the printing mask 124 is separated from the surface of the multilayer substrate 104 when the components of the semiconductor device are miniaturized and the solder films needs to be attached to parts of a small area of the surface of the multilayer substrate 104. On the other hand, solder films formed of a solder cream having a high fluidity tend to flow and are liable to short-circuit the chips. Thus, it is possible that both the solder cream having a high fluidity and the solder cream having a low fluidity cause faulty chip mounting.
A semiconductor device fabricating method disclosed in Japanese Patent Laid-open No. Hei. 11-54665 a cavity in a ceramic substrate, a semiconductor chip is placed in the cavity, the semiconductor chip is bonded to the bottom surface of the cavity, the semiconductor chip is connected to a wiring layer with bonding wires, and the semiconductor chip and the bonding wires are covered with a potting material. The potting material is below the level of the surface of the ceramic substrate by 0.2 mm or more to enable forming of the solder films on the surface of a resin substrate superposed on the ceramic substrate, by printing, and to facilitate bonding chips to a wiring layer with the solder films.
The present invention has been made to solve the foregoing problems. It is a first object of the present invention to provide a semiconductor device not causing faulty chip mounting and capable of being manufactured at a high yield rate.
According to an aspect of the invention, there is provided a semiconductor device comprising: a substrate provided with a wiring layer on its surface, and a cavity; a semiconductor chip disposed in the cavity of the substrate; a cover covering the semiconductor chip disposed in the cavity of the substrate, and provided in a part of its surface with a protrusion having a height from the surface of the substrate greater than the thickness of the wiring layer; and circuit elements bonded to the wiring layer located on the surface of the substrate by a conductive bonding material.
Accordingly, the protruding parts can be easily formed, an amount of the bonding material necessary for bonding the chips to the lands can be applied to the surfaces of the lands formed on the surface of the substrate, and hence faultily mounted circuit elements can be reduced and semiconductor devices can be manufactured at a high yield rate at low costs.
It is a second object of the present invention to provide a method of fabricating a semiconductor device not causing faulty chip mounting.
According to another aspect of the invention, there is provided a method of manufacturing a semiconductor device including: a first step of preparing a substrate provided with a wiring layer on its surface, and a cavity, and disposing a semiconductor chip in the cavity; a second step of covering the semiconductor chip disposed in the cavity of the substrate with a cover, and forming a protrusion having a height from the surface of the substrate greater than the thickness of the wiring layer in a part of the surface of the cover; and a third step of placing a printing mask for a conductive bonding material application process on the surface of the substrate, and applying a conductive bonding material through the printing mask to the wiring layer on which circuit elements are to be arranged.
Accordingly, since the printing mask slightly spaced from the surface of the substrate by the protrusions is brought into close contact with the surface of the substrate when printing the bonding material on the substrate, the printed bonding material can be prevented from separating from the substrate together with the printing mask. Therefore, the circuit elements can be surely bonded to the wiring lines, the yield rate can be improved and the highly reliable semiconductor device can be manufactured at low costs.
It is a third object of the present invention to provide a printing mask for fabricating a semiconductor device not causing faulty chip mounting.
According to a further aspect of the invention, there is provided a printing mask comprising: a masking film provided with openings through which a conductive bonding material is to be applied to a surface of a substrate; and protrusions formed in parts near the openings of the masking film of a surface of the masking film facing the substrate.
Accordingly, the bonding material can be surely printed on the surface of the substrate even if the areas of the openings of the mask body are small. Thus, the semiconductor devices can be easily manufactured at a high yield rate, using the printing mask of the present invention.
Other objects and advantages of the invention will become apparent from the detailed description given hereinafter. It should be understood, however, that the detailed description and specific embodiments are given by way of illustration only since various changes and modifications within the scope of the invention will become apparent to those skilled in the art from this detailed description.